Ethernet Interface Design |
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GbE
designs are functionally similar to SONET at the E/O level. Both designs
incorporate a CDR and serdes function before passing the data stream onto
more complicated processing. Also both designs use industry standard i/f
definitions for the deserializer output. For ethernet these include, GMII,
RGMII, serdes, MII, RMII or TBI. For SONET a UTOPIA I, II or III varient
can be used.
GbE single mode links operate over 1310nm while SONET wavelengths vary over a number of channels defined by the ITU grid. A GbE or SONET design implements the E/O functionality using a standard 9 pin form-factor, SFF (small form factor) or SFP (small form pluggable) module supplied by vendors such as Infineon or Agilent. The use of such a module makes the E/O portion of the design very simple wrt a long haul SONET design in that no driver chip or modulator is required. After the
SERDES device GbE data must be decoded and processed using a MAC device.
The decoding is necessary because before transmission the data was coded
to help with clock recovery, byte synchronization and to insert inband
control codes.
The MAC device
could be implemented using a dedicated device, programmable FPGA or integrated
into a switching device. The main function is to handle the layer 2 functions
of an Ethernet network including address recognition, 8/10b decoding and
control code handling. The data stream out of the MAC device can be sent
to an embedded processor or to a dedicated switch fabric to handle upper
switching functions. |
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To contact us | |||||||||||||||||||||||||||||||||||||||||||
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Email: djy@tracecircuits.com | |||||||||||||||||||||||||||||||||||||||||||
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